Literaturliste zu "Denken in Hardware"

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[1] Rajagopal Ananthanarayanan, Dharmendra Modha, System and Method for Kortical Simulation, US Patent 7,818, 273 B2, 19. Oktober 2010.

[2] U. Ramacher, W. Raab, J. Anlauf, U. Hachmann, J. Gläß, A. Wurz, J. Beichter, N. Brüls, M. Weßeling, E. Sicheneder R. Männer, SYNAPSE-1: A High-Speed General Purpose Parallel Neurocomputer System, Proceedings of the Parallel Processing Symposium, April 1995, S. 774--781 [PDF]

[3] Paul Merolla, John Arthur, Filipp Akopyan, Nabil Imam, Rajit Manohar, Dharmendra S. Modha, A Digital Neurosynaptic Core Using Embedded Crossbar Memory with 45pJ per Spike in 45nm, IEEE Custom Integrated Circuits Conference, September 2011 [PDF]

[4] Jae-sun Seo, Bernard Brezzo, Yong Liu, Benjamin D. Parker, Steven K. Esser, Robert K. Montoye, Bipin Rajendran, José A. Tierno, Leland Chang, Dharmendra S. Modha, and Daniel J. Friedman, A 45nm CMOS Neuromorphic Chip with a Scalable Architecture for Learning in Networks of Spiking Neurons, IEEE Custom Integrated Circuits Conference, September 2011 [PDF]

[5] P. Hagmann, L. Cammoun, X. Gigandet, R. Meuli, C.J. Honey, V.J. Wedeen, O. Sporns, K.J. Friston, Mapping the Structural Core of Human Cerebral Cortex, PLoS Biology, 6(7): e159, 2008, DOI: 10.1371/journal.pbio.0060159 [PDF]

[6] Zhang J. Chen, Yong He, Pedro Rosa-Neto, Jurgen Germann, Alan C. Evans, Revealing Modular Architecture of Human Brain Structural Networks by Using Kortical Thickness from MRI, Cerebral Cortex, Vol. 18, S. 2374--2381, Oktober 2008, DOI:10.1093/cercor/bhn003 [PDF]

[7] Dharmendra S. Modhaa, Raghavendra Singhb, Network architecture of the long-distance pathways in the macaque brain, Proceedings of the National Academy of Sciences, 27. Juli 2010, DOI:10.1073/pnas.1008054107 [PDF]

[8] S. Adee, Cat Fight Brews Over Cat Brain, IEEE Spectrum Tech Talk, 23. November 2009

[9] R. Rojas, Wettlauf der Himmelstürmer, Telepolis, 23. August 2011

[10] C. Dianne Martin, ENIAC: The Press Conference That Shook the World, IEEE Technology and Society Magazine, Dezember 1995 [PDF]

[11] John von Neumann, First Draft Report on the EDVAC, Contract No. W-670-ORD-492 between the United States Army Ordnance Department and the University of Pennsylvania, Moore School of Electrical Engineering, University of Pennsylvania, unveröffentlichtes Manuskript [PDF]

[12] W. McCulloch und W. Pitts, A logical calculus of the ideas immanent in nervous activity, Bulletin of Mathematical Biophysics, 1943, Vol. 5, S. 115--133 [PDF]

[13] A. M. Turing, Proposals for Development in the Mathematics Division of an Automatic Computing Engine (ACE), National Physical Laboratory, 1945, neuer Druck: Com. Sci. 57, National Physical Laboratory, Teddington, UK, 1972

[14] Xin Jin, Steve Furber, John Woods, Efficient Modelling of Spiking Neural Networks on a Scalable Chip Multiprocessor, IJCNN 2008, S. 2813--2820 [PDF]

[15] Thomas Sharp, Cameron Patterson and Steve Furber, Distributed Configuration of Massively-Parallel Simulation on SpiNNaker Neuromorphic Hardware, International Joint Conference on Neural Networks (IJCNN 2011) San Jose, California, 31. Juli bis 5. August 2011 [PDF]

[16] W. Daniel Hillis, The Connection Machine, MIT Press Series in Artificial Intelligence, 1985

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